Paper Updates!
The RCSL team had good success in the first half of 2026, with multiple papers accepted at top-tier conferences.
Changhong Li has a paper accepted at FPL which investigates resource-aware pruning for edge AI on FPGAs, which aims to cut down the model search time while also achiving better pareto solutions allowing developers to arrive at better model-architecture-resource tradeoffs.
The joint work by Changhong Li and Bharathkumar Hegde was accepted at RTSI. This work integrates model-predictive current control with lightweight harmonic predictors to accurately control and limit the harmonic emissions from EV charging systems.
Eashan Wadhwa’s work on Context-aware Simopt-Power was accepted for presentation at SMACD. This work integrates context-awareness using structural netlist information of the circuit being evaluated with the toggle data generated by Simopt to optimise the logic decomposition model, reducing the area overheads incurred by the previous Simopt optimisations.
Oran Hayes’s work for his master thesis (supervised by George Floros) on early stage power deliver network optimisation was accepted for presentation at SMACD, in collaboration with the research team at the University of Thessaly, Greece.
The team has been hard at work, and there are many other submissions under review. Congrats to all!